An ultra-wide-band receiver based on a harmonic selection technique to improve the operational bandwidth of 5G networks has been developed by Tokyo Tech researchers in a new study. Fifth generation (5G) mobile networks are now being used worldwide with frequencies of over 100 Hz. To keep up with the data traffic in these networks, appropriate receivers are necessary. In this regard, the proposed technology could revolutionize the world of next-generation communications.
As next-generation communication networks are being developed, the technology used to deploy them must also evolve alongside. Fifth generation mobile network New Radio (5G NR) bands are continuously expanding to improve the channel capacity and data rate. To realize cross-standard communication and worldwide application using 5G NR, multi-band compatibility is, therefore, essential.
Recently, millimeter-wave (mmW) communication has been considered a promising candidate for managing the ever-increasing data traffic between large devices in 5G NR networks. In the past few years, many studies have shown that a phased-array architecture improves the signal quality for 5G NR communication at mmW frequencies. Unfortunately, multiple chips are needed for multi-band operation, which increases the system size and complexity. Moreover, operating in multi-band modes exposes the receivers to changing electromagnetic environments, leading to cross-talk and cluttered signals with unwanted echoes.
To address these issues, a team of researchers from Tokyo Institute of Technology (Tokyo Tech) in Japan has now developed a novel “harmonic-selection technique” for extending the operational bandwidth of 5G NR communication. The study, led by Professor Kenichi Okada, was published in the IEEE Journal of Solid-State Circuits. “Compared to conventional systems, our proposed network operates at low power consumption. Additionally, the frequency coverage makes it compatible with all existing 5G bands, as well as the 60 GHz earmarked as the next potential licensed band. As such, our receiver could be the key to utilizing the ever-growing 5G bandwidth,” says Prof. Okada.
To fabricate the proposed dual-channel multi-band phased-array receiver, the team used a 65-nm CMOS process. The chip size was measured to be just 3.2 mm x 1.4 mm, which included the receiver with two channels.
The team took a three-pronged approach to tackle the problems with 5G NR communication. The first was to use a harmonic-selection technique using a tri-phase local oscillator (LO) to drive the mixer. This technique decreased the needed LO frequency coverage while allowing for multi-band down-conversion. The second was to use a dual-mode multi-band low-noise amplifier (LNA). The LNA structure not only improved the power efficiency and tolerance of the inter-band blocker (reducing interference from other bands) but also achieved a good balance between circuit performance and chip area. Finally, the third prong was the receiver, which utilized a Hartley receiver’s architecture to improve image rejections. The team introduced a single-stage hybrid-type polyphase filter (PPF) for sideband selection and image rejection calibration.
The team found that the proposed technique outperformed other state-of-the-art multi-band receivers. The harmonic-selection technique enabled operation between (24.25 – 71) GHz while showing above 36-dB inter-band blocker rejection. Additionally, the power consumed by the receiver was low (36 mW, 32 mW, 51 mW, and 75 mW at frequencies of 28 GHz, 39 GHz, 47.2 GHz, and 60.1 GHz, respectively).
“By combining a dual-mode multi-band LNA with a polyphase filter, the device realizes rejections to inter-band blockers better than other state-of-the-art filters. This means that for currently used bands, the rejections are better than 50dB and over 36dB for the entire supported (24-71) GHz operation region. With new 5G frequency bands on the horizon, such low-noise broadband receivers will prove to be useful,” concludes an optimistic Prof. Okada.
And his vision may be realized soon!
Reference
Authors : | Yi Zhang1, Jian Pang1,, Zheng Li1, Minzhe Tang1, Yijing Liao1, Ashbir Aviat Fadila1, Atsushi Shirane1, and Kenichi Okada1 |
Title : | A Power-Efficient CMOS Multi-Band Phased-Array Receiver Covering 24-71GHz Utilizing Harmonic-Selection Technique with 36-dB Inter-Band Blocker Tolerance for 5G NR |
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Affiliations : | 1Department of Electrical and Electronic Engineering, Tokyo Institute of Technology |